IBIS Macromodel Task Group Meeting date: 24 July 2012 Members (asterisk for those attending): Agilent: * Fangyi Rao * Radek Biernacki Altera: * David Banas Julia Liu Hazlina Ramly Andrew Joy Consulting: Andy Joy Ansys: Samuel Mertens Dan Dvorscak * Curtis Clark Steve Pytel Arrow Electronics: Ian Dodd Cadence Design Systems: Terry Jernberg * Ambrish Varma Feras Al-Hawari Cavium Networks: Johann Nittmann Celsionix: Kellee Crisafulli Cisco Systems: Ashwin Vasudevan Syed Huq Ericsson: Anders Ekholm IBM: Greg Edlund Intel: * Michael Mirmak LSI Logic: Wenyi Jin Maxim Integrated Products: * Mahbubul Bari Mentor Graphics: * John Angulo Zhen Mu * Arpad Muranyi Vladimir Dmitriev-Zdorov Micron Technology: Randy Wolff Justin Butterfield NetLogic Microsystems: Ryan Couts Nokia-Siemens Networks: * Eckhard Lenski QLogic Corp. James Zhou Sigrity: Brad Brim Kumar Keshavan Ken Willis SiSoft: * Walter Katz * Todd Westerhoff Doug Burns * Mike LaBonte Snowbush IP: Marcus Van Ierssel ST Micro: Syed Sadeghi Teraspeed Consulting Group: * Scott McMorrow Bob Ross TI: Casey Morrison Alfred Chong Vitesse Semiconductor: Eric Sweetman Xilinx: Mustansir Fanaswalla * Ray Anderson The meeting was led by Arpad Muranyi ------------------------------------------------------------------------ Opens: - None -------------------------- Call for patent disclosure: - None ------------- Review of ARs: - Arpad: There was an AR from last week for me to create a bus package model example using BIRD 125 - Some complications have come up - Bob to propose a simpler way for addressing the needs of parameter passing under [External Model] and [External Circuit] - not done ------------- New Discussion: Arpad: I would like o show a presentation about package modeling - Walter: We should address the physics of the problem, not vendor specific approaches. - Arpad: We can combine that with what Michael M was presenting last week. - Michael M: Ambrish had an unanswered question last week. - Ambrish: It was about MCP. - Michael M: We seem to be oriented toward pre-PCB analysis - Some information may not be available at the time models are used. - Not sure MCP adds the kind of value we are looking for. Walter showed his previous email with additional comments: - Walter: There was a question about package discretes - IBIS-ISS can handle those as elements - Walter explained the email he had sent to the list, with port counts - John: The port counts seem small - Walter: It is just an example - No one so far disagrees with this - Arpad: The pad and pin counts for power are different - The word "resolution" is confusing here - Subsets of these ports can be used - Walter: It is impractical to create a subset that models the physics correctly - No one creates full models at this level of detail though - Questions: - What can we do that allows users to make engineering decisions? - Can VDD and VSS bumps be just two nodes? - Users can can't control routing and bypass affecting above 10GHz - Two nodes might be OK, except in advance power delivery cases - Can a subset of the VDD/VSS pins be used? - Is bump-buffer interconnect already in buffer models? - For legacy IBIS this is C_comp - For AMI this is already in on-die s-param models - Michael M: What is the distinction between bump and buffer pads? - Walter: 802.3 talks about test probes - These are places specified there - A t-coil is on-die interconnect between bump and buffer - David: The bump is the point that contacts the package when the die is correctly placed - Michael M: On-die models are not universal - Walter: Some do it - Michael M: We tend to use non s-param models - Walter: It will probably be IBIS-ISS regardless - Arpad: What is the purpose of discussing these topologies? - Walter: The die and package models are generated from different physical databases - Scott: It is reasonable to work with s800p models - Walter: Packages can be much larger - Scott: We partition by locality based on coupling - Walter noted that Scott and Arpad disagree with his premise about whole package models - Walter discussed slices: - Package model slices: - Coupled and uncoupled - Channel and power - On-die model slices - Channel and power - Walter described types of models supplied by various (anonymous) vendors - Walter: Vendor F is the one Scott spoke about - This uses MCP - Arpad: As long as subcircuits can have anything, this does not matter - Walter: Crosstalk is not tied just to pins - We should support the way vendors are currently modeling advanced cases - Arpad: I have added to BIRD 125 but we are out of time to show it - Michael M: Does the advanced model assume the layout is all there? - Who is the audience? - Scott: There is little coupling outside of each locality on a die - On packages coupling extends further, even edge to edge - Users of these are pushing the state of the art - They will often extract quadrant package models themselves - Single models can be extracted from those - Walter: What does IBIS 6.0 need to support both vendors and users? - Arpad might extend BIRD 125 - I will have my own proposal - IBIS does not yet have: - ISS - bus level models - generic models that can be assigned to pins with different lengths - Michael M: This is similar to what I am asking for - Other IC vendors should present their own needs - Arpad: Do wee need anything else? - Walter: We need to hear from other IC vendors Arpad: We have no time for my presentation, but it is on the website ------------- Next meeting: 31 Jul 2012 12:00pm PT Next agenda: 1) Task list item discussions ------------- IBIS Interconnect SPICE Wish List: 1) Simulator directives